Abstract: A 0.25-mum CMOS, multi-rate clock and data recovery (CDR) circuit that leverages unique analog/digital boundaries in its phase detector and loop filter to achieve a fully integrated CDR ...

In this study, two-dimensional electronic fingerprinting was demonstrated and integrated into a memristive true random number generator (TRNG). For the device function of the TRNG, two modes of ...

Abstract: This paper presents an all-digital phase-locked loop (ADPLL) clock generator for globally asynchronous locally synchronous (GALS) multiprocessor systems-on-chip (MPSoCs). With its low power ...