The VLSI design cycle is divided into two phases ... Fig-1. Logical Equivalence Check flow diagram There are various EDA tools for performing LEC, such as Synopsys Formality and Cadence Conformal. We ...

CATALOG DESCRIPTION : Basic concepts in VLSI CAD with emphasis on physical design, fundamental algorithms for CAD problems, development of CAD tools. REQUIRED TEXT: Andrew B. Kahng, Jens Lienig, Igor ...