In a recent article on The Chip Letter [Babbage] looks at the Intel iAPX 432 computer architecture. This was an ambitious, hyper-CISC architecture that was Intel’s first 32-bit architecture. … ...

For example, the IBM PowerPC (a RISC architecture) has an ISA of a similar size to the IBM System 370 (a CISC architecture). Meanwhile, the DEC PDP-8 (a CISC architecture) only has 8 instructions.

A CISC architecture can encode much more detail into a single instruction which can greatly improve performance. For example, a RISC architecture might just have one or two "Add" instructions ...

Remarkably, the i960 as a solid RISC (Reduced Instruction Set Computer) architecture has its roots in Intel’s ill-fated extreme CISC architecture, the iAPX 432.

CISC to RISC and RISC to RISC. The ARM-based M series is a RISC design rather than Intel's x86 CISC architecture. RISC circuits use less complex instructions, ...

It also set the stage for Intel’s commitment to the CISC architecture, while companies like Arm used RISC. The Intel 8086 also introduced several important features, such as segmented memory ...